Silansys is developing a turnkey
standards-based Serial Communications PHY for computer applications
in a proprietary 0.13um process for a tier-1 Semiconductor
Product company. Key value-add from Silansys include:
Novel All-Digital Clock &
Data Recovery Algorithm
Power Reduced and Multi-port
compatible Macro
Reference Design for 90nm
and future roadmap
Analysis and Determination
of All Jitter Sources
Comprehensive Verification
of BER
Full-chip behavioural and
transistor-level Verification
